M2: Analysis and Design of Regenerative Comparators for Low Offset and Noise
Asad A. Abidi, University of California, Los Angeles
Abstract: Regenerative comparators appear in the critical path of most of today’s circuits for digital communications and signal processing. In communications receivers, they are the data decision elements, or slicers. In A/D converters, they carry out quantization. In digital phase-locked loops, they can act as the phase detector.
As power supplies scale down, offset and noise in a comparator become an increasingly important bottleneck to performance. Circuit designers in the semiconductor industry are spending large amounts of development time using transient, time-domain methods to simulate noise and offset in comparators. There is little theory available to serve as a guide. Tradeoffs are seen between noise, comparator latency, and bit-error rate; but it is not clear why.
Unlike amplifiers, it is hard to analyze comparators because they will often involve dynamic signal processing and regeneration. This tutorial will present a easy-to-follow analysis of two comparator circuits used widely today, the Strong Arm latch and the Double-Tailed Comparator, both of which involve implicit dynamic amplification, and in one case with time-varying parameters. The analysis shows methods to compensate offset with no additional power and minimal impact on speed, and to lower input-referred noise at the expense of power employing surprisingly simple expressions for noise bandwidth. The analysis is validated for accuracy by extensive simulations and measurements.
He received the BSc degree in Electrical Engineering from Imperial College, London in 1976, and the PhD from the University of California, Berkeley in 1982. He worked at Bell Laboratories, Murray Hill until 1985, and then joined the faculty of the University of California, Los Angeles where he is Distinguished Chancellor’s Professor of Electrical Engineering. With his students he has developed many of the radio circuits and architectures that enable today’s mobile devices. Among other awards, Professor Abidi has received the 2008 IEEE Donald O. Pederson Award in SolidState Circuits and the Best Paper Award from the IEEE Journal of Solid-State Circuits in 2012. The University of California, Berkeley’s Department of EECS recognized him as a Distinguished Alumnus in 2015. He was elected Fellow of IEEE in 1996, Member of the US National Academy of Engineering, and Fellow of TWAS, the world academy of sciences. His present research is on the fundamentals of design of widely used analog and RF circuits, such as receiver front-ends, phase-locked loops, sampling circuits, distortion, and regenerative comparators.